Senior Verilog HDL developer with FPGA experience (xilinx XC3S200)
$15-25 USD / hour
Cerrado
Publicado hace más de 4 años
$15-25 USD / hour
Looking for assistance in verilog HDL for design of SRAM and HDMI controller. Specifically, designing verilog code to take incoming data, put the data into a FIFO SRAM, pass the data through an RGB encoder, then to an HDMI encoder, and finally out to an HDMI screen. Alternatively, would like to achieve the same system using pipelining to synchronize clocks of the input and output using a shallow BRAM on the FPGA.
Hi there! My name is Fernando and I'm very interested in your proyect and would be happy to work on it.
I'm a Senior FPGA Designer/Developer and I'm a Senior Electronic Engineer with 6+ years of experience in the Aerospace and IoT industries.
Also, I belong to the Preferred Freelancer team, which is the elite top 1% of Freelancer.com.
I can work with your FPGA Spartan 3 using ISE. I would like to know more details about your project.
You can trust that I will give my best to deliver a work that exceeds your expectations.
Thanks for your consideration.
Best regards
Hello,
I'm an FPGA expert with more then 10 years of experience in Video and Image processing.
I'd love to discuss the details with you.
Please send me the complete specification for the project.
Hi,
I have experience in either SRAM development and interfacing as well as FPGA design experienece for more than 16 years.
I think I can handle this project. Please chekout my project portfolio from my homepage.
If you need more info , please let me know.
Thanks ,
Gevorg Ohanjanyan.