FPGA Jobs

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A Field-Programmable Gate Array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing. FPGA are composed of logic blocks, interconnects, random access memory blocks and I/O elements, giving designers the flexibility to create custom circuits based on the latest technologies. An FPGA expert can create custom integrated circuits in a shorter timeframe and with fewer resources than traditional chip designs.

By hiring an FPGA expert on Freelancer.com, you can develop an optimized solution for your application that will offer greater speed, lower power consumption, higher reliability and flexibility. Moreover, you have the opportunity to acquire better tools and support specialized engineers to develop your design needs quickly.

Here's some projects that our Field-Programmable Gate Array Experts made real:

Developing video processing pipelines
Designing face recognition in Verilog or gate level model
Creating digital signature schemes for FPGA design suites
Developing a First-In-First-Out (FIFO) buffer in VHDL
Constructing GCN module in Verilog code
Translating Matlab code into synthesizable VHDL code
Troubleshooting and implementing EdDSA algorithms in Vivado design suites
Designing I2C master testbenches for communicating with slaves
Performing timing analyses for RTOS multithreaded hardware/software systems
Creating RISC-V pipelined processors and eliminating hazards

An FPGA expert provides the highest caliber of expertise required to implement advanced designs quickly and efficiently. By hiring one of our experts on Freelancer.com you can be sure to get the best results for your project need. So don't wait any longer; post your own project today and hire one of our skilled Field-Programmable Gate Array Experts.

De 5,416 opiniones, los clientes califican nuestro Field-Programmable Gate Array Experts 4.83 de un total de 5 estrellas.
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Acerca de FPGA

Here's some projects that our Field-Programmable Gate Array Experts made real:

Developing video processing pipelines
Designing face recognition in Verilog or gate level model
Creating digital signature schemes for FPGA design suites
Developing a First-In-First-Out (FIFO) buffer in VHDL
Constructing GCN module in Verilog code
Translating Matlab code into synthesizable VHDL code
Troubleshooting and implementing EdDSA algorithms in Vivado design suites
Designing I2C master testbenches for communicating with slaves
Performing timing analyses for RTOS multithreaded hardware/software systems
Creating RISC-V pipelined processors and eliminating hazards

De 5,416 opiniones, los clientes califican nuestro Field-Programmable Gate Array Experts 4.83 de un total de 5 estrellas.
Contratar a Field-Programmable Gate Array Experts

2 trabajos encontrados

FPGA Signal Processing for Wireless Comm

3 días left

I need an FPGA expert to implement signal processing code for wireless communication. The baseline modulation technique is QAM, with multiple waveforms to be provided by us. Key Requirements: - Implement signal processing functions on FPGA - Support multiple modulation techniques, starting with QAM - Experience with wireless communication protocols - Proficiency in FPGA programming and hardware description languages (HDL) Ideal Skills: - Strong background in digital signal processing (DSP) - Experience with FPGA development tools and environments - Knowledge of wireless communication standards and practices - Ability to work with provided modulation waveforms Please include relevant experience in your bid. Expected completion: March 31, 2026

Diseño de circuitos Procesamiento Digital de Señales Ingeniería eléctrica Electrónica Sistemas Embebidos FPGA Procesamiento de Señales Simulación Ingeniería de telecomunicaciones Verilog / VHDL

€32 / hr Average bid

€32 / hr Oferta promedio

46 ofertas

Ofertar ahora

Design 8-Bit FPGA CPU

1 día left

Design a basic CPU (even 8‑bit or a minimal RISC‑V subset) in Verilog/VHDL, implement it on a low‑cost FPGA board, and run a small instruction set or demo program, emphasizing microarchitecture choices and timing closure. Deliverables: HDL source, timing/area reports, simulation testbenches, and a brief report on design methodology and veriﬁcation strategy. • HDL source files, well commented • Simulation testbenches showing functional coverage of the instruction set • Timing and area reports from synthesis/place-and-route • A short, focused document describing micro-architecture choices, verification flow, and how timing closure was achieved • Schematic/block diagram images that make the pipeline and datapath easy to follow • A bitstream or prog...

Diseño digital Documentación Ingeniería eléctrica Electrónica Sistemas Embebidos FPGA Programación Simulación Verilog / VHDL

€178 Average bid

€178 Oferta promedio

32 ofertas

Ofertar ahora

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