I have about 20 years experience in FPGA design, where i have worked on Xilinx, Altera and Lattice FPGAs.
How would i go about working on this project requirement?
1. i have worked on Lattice XP2 devices. will understand a bit more about the mach fpgas.
2. i would be using verilog as my choice of HDL, unless you want it to be done using VHDL. VHDL is also possible.
3. i would be using modelsim software to simulate the design.
4. already have lattice diamond latest version installed and working on my windows PC.
5. functional verification would be done using a verilog testbench and modelsim simulator.
6. then verilog design to be implemented using lattice diamond software. if necessary, i could use the fpga internal probe facility available in the lattice diamond software.
7. if required, i could look to procure a xp2 based or mach based board locally in pune, india. the cost part can be worked out post discussion.
8. we can collaborate through the freelance collaboration tools.
9. would get more design implementation details from you on the I2c slave and how to utilize the lattice fpga internal EBR for on-chip memory implementation.
10. we could discuss more and then finalize the project details. i could share a project plan with you, before we start the design implementation.
Regards,
Yogesh Torvi