AMBA AXI protocol verification

Dear sir I have more than 8 years experience in digital design using vhdl and verilog please check my profile also please message me so that we can discuss

Which one do you want to understand. ASIC/FPGA design flow or RTL to GDS or UVM verification. Do you have access tools.

Hey , I have 5 year experience in VLSI functional verification. I did the work on AMBA verification in my company. I have hands on experience in SV is 5 year and 3 year on UVM. I will implement amba bfm model and test bench. scoreboard will also be implemented. Product is not ready, i have to create it from scratch and if you want, you can participate too . I asked for the 30 days for complete the project because i have to create it from scratch. Amount of hard work and complexity of protocol justified the amount of money i asked for.

hello I have experience in AMBA bus AHB and APB dsign and verification with UVM and physical design with )Synopsys DC, Cadence encounter, from rtl2gds) tape out done at tsmc 90nm and 65nm, AMS 0.35um I use verilog and systemverilog with modelsim or ncsim, with SoC ARM and Leon3mp best regards raul

Recently completed project on vhdl/verilog based AMBA protocol development. I could understand your project requirement and fulfill it satisfactorily. Language Knowledge:vhdl, verlog. Software knowledge:Quartus, Xilinx, Modelsim. Hardware Knowledge: DE1, DE2, MAX II, CPLD, FPGA