*********** DSP PLENTY EXPERIENCE ***************
HELLO, Dear Kajang
Without breaking any formality, I will briefly introduce my career.
The first project I started after graduating from university 10 years ago was a radar signal processing program.
At that time, I wrote an FPGA program using the Quartus II tool for the first time, and it was a very large task in which the resource consumption (logic cell, memory) of the cyclone series EP3C120F484I7 element exceeded 90% or more.
While writing a radar signal processing program (FPGA (Intel FPGA, Xilinx ISE, VIVADO)) of various systems including CW and Impulse radar for many years,
I was well versed in the tools and the overall system, and on the one hand, I also designed the signal processing board.
I have accumulated a lot of experience in this process, but the problem I had a hard time with was the DRFM signal processing program with the operating frequency of the FPGA being 2~4GHz.
After that, I gained a lot of practical experience while designing, measuring, and calibrating RF parts including LNA, MIXER, PA in the x, ku, mmw bands.
I promise good work ethic and attitude, active and excessive commitment, and integrity as a whole.