Quartus Prime & System Verilog Code

* Full Instructions found in pdf attachment. File: System_Verilog_Instructions * * Sample Code is found in attached files * * Program used : Quartus Prime * * Block Diagram template also found in attached files * * Hardware used: DE10-Lite kit with MAX10 10M50DAF484C7G FPGA * ____________ Final Products: ____________ -A software-level block diagram showing the connections between the System Verilog modules described in pdf -System Verilog implementations of the modules described in pdf. -Valid hardware output. Final Note: Please attach any necessary files with a brief description of the work done and how they link together. I will program my hardware with what is given. Thank you in advance.