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Write some Software

Need a Simple AES algoritham project which accept key and plan text and provide encrypted text , need both code , test bench and simulation

Habilidades: Verilog / VHDL

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Información del empleador:
( 0 comentarios ) Bangalore,Trivandum, Cochin, India

ID de proyecto: #12134559

5 los freelancers están ofertando un promedio de $76 para este trabajo.

ahmedmohamed85

A proposal has not yet been provided

$100 USD en 1 día
(246 comentarios)
7.4
loi09dt1

I already did this project before. It is AES256 with full testbench which is fully verified. Please contact me and we can discuss more. Thanks

$100 USD en 1 día
(80 comentarios)
6.1
rohi1710rohi1710

Hi, -FPGA design engineer since last 7 years -Expertise in verilog/VHDL Please find below details of the projects TSMAC Hardware acceleration(3months) The project is to develop hardware acceleration block for TS Más

$100 USD en 3 días
(4 comentarios)
4.5
$55 USD en 10 días
(0 comentarios)
0.0
dangluonghoangvu

Hi you, i worked on this project last month. My source code is ok when simulation. Can you bing me to discuss further, I can share this algorithm for you Thanks, Vu

$25 USD en 1 día
(0 comentarios)
0.0