Cerrado

Project for rohi1710rohi1710

Hi rohi1710rohi1710, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

Habilidades: FPGA, Verilog / VHDL

Ver más: need discuss details project, text chat project javappt, free wap chat project, myspace chat project, text chat project java, vb6 chat project, flash chat project, technical details qfund project, add live chat project, chat project, simple java chat project, video chat project aspnet

Información del empleador:
( 7 comentarios ) Dhanbad, India

ID de proyecto: #12136402

4 los freelancers están ofertando un promedio de $14 para este trabajo.

rohi1710rohi1710

Hired by the Employer

$10 USD en 3 días
(4 comentarios)
4.5
ssi57e814d4beaeb

Writing Verilog HDL codes which can be synthesised is what I do everyday, so give me the opportunity to write verilog codes for complex functions which can be easily synthesised on an FPGA board.

$15 USD en 1 día
(0 comentarios)
0.0
$15 USD en 1 día
(0 comentarios)
0.0
tulikaranjansmit

I am Tulika Ranjan M.Tech in VLSI Design from NIT-Surathkal. I have been involved in an internship at NAL and LRDE (DRDO). Presently working with HCL Technologies Ltd. having 2+ years of experience. I am very profess Más

$15 USD en 5 días
(0 comentarios)
0.0