Assembler & simulator for a MIPS processor

Design and implement the assembler of the MIPS microprocessor that covers the following subset of MIPS core / MIPS arithmetic core instructions: add, sub, slt, and, or, nor, lw, sw, beq, bne, j. (Plus “ori” and “lui”.) Detailed description: 1. The main function of your simulator is to translate the given MIPS assembly file and fill an 256B (0x0100) or 64 words “memory” with the translated program and data. [login to view URL] assembler must create a 256B file named “[login to view URL]” that contains 256B “memory” in big- endian format. [login to view URL] section starts with “.data” in the MIPS assembly file and the following data specified with “.byte” or “.word” directives are stored from 0x0000 in “memory.” [login to view URL] section starts with “.text” in the MIPS assembly file and the following codes are stored from 0x0080 in “memory.” [login to view URL] assembler is supposed to support one pseudo-instruction (“la”), and “syscall” instruction that are not included in standard MIPS instruction set.