Design of a built in-self-test (BIST) system for a 4 bit ALU

Design of a built-in self-test (BIST) system for a 4-bit ALU Overview of coursework Your first task is to design, simulate and test a BIST system for a 4-bit ALU . Your second task is to Implement and download your design to a target system. The target FPGA will be a Xilinx XC4010XL (PC84 -09), sited on an Xess corp XS40 PCB. Detailed requirements Part 1 Add/subtract module. First you will be required to design a 4-bit ALU. The ALU will be required to either ADD or SUBTRACT two 4-bit binary numbers. The numbers can be A (A3,A2,Al,AO) and B {83, B2,Bl,BO). The ADD/SUBTRACT modes will be selected by a single binary signal ie 0 = ADD, 1 = SUBTRACT . The ALU will be required to be simulated to check that it is working correctly. The BIST of your designed ALU will be next. You will have to design circuits to: 1. Generate test inputs 2. Examine test outputs 3. Output test final test result from a single pin of the FPGA Part 2 Multiplier module Repeat the process of BIST for a multiplier that will multiply two 3-bit binary numbers. Report The whole project should be written as a formal report showing all the designs done, simulations and results, with appropriate conclusions. Discussions on the scalability of your designs should be included, together with timing implications of your designs. ## Deliverables 1) Complete and fully-functional working program(s) in executable form as well as complete source code of all work done. 2) Installation package that will install the software (in ready-to-run condition) on the platform(s) specified in this bid request. 3) Complete ownership and distribution copyrights to all work purchased. ## Platform OPERATING SYSTEM:WINDOWS THE PROGRAM MUST BE DESIGNED AND SIMULATED BY USING XILLINX FOUNDATION APPLICATION.