Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Contratar a Verilog / VHDL Designers

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    21 trabajados encontrados, precios en EUR
    €23 Oferta Promedio
    4 ofertas

    Hi, You will have to generate Precision PWM of 0...40khz +/- 0.1Hz. Refer the attachment and I have tried with STM32 using HRTIM but there is 0.34hz deviation at 30002 Hz. So it doesnt meet the requirement. I request pl have a look and you need to provide the right solution and design here to achieve this.

    €44 (Avg Bid)
    €44 Oferta Promedio
    6 ofertas

    Looking for someone with good knowledge of microblaze and vhdl

    €117 (Avg Bid)
    €117 Oferta Promedio
    7 ofertas

    Need someone that is deeply knowledgeable in verilog programming. Need to be ABLE to build the CPU, build memory-less, combinational components and sequential components (i.e create mux and adder's in ALU), implement 2 stage pipeline for RISC-V Processor, etc.

    €39 (Avg Bid)
    €39 Oferta Promedio
    8 ofertas

    I want to make the interface between the sinewave function generator and FPGA kit via ADC that belong to the same kit 1. Show the result on the test - bench window 2.I Want to show the practical result on LCD screen 3. Also use the leds to show the digital value for analog value

    €140 (Avg Bid)
    €140 Oferta Promedio
    6 ofertas

    need help with a seven segment on Nexys 4 DDR Development board

    €68 (Avg Bid)
    €68 Oferta Promedio
    3 ofertas

    The project's goal is to have two I2S codecs, both at the same samplerate, selectable 48/96/192KHz, connected to a CPLD and the CPLD to provide a TDM protocol for connection to a MCU. Codecs will have 48/96/192KHz, stereo, 32bits sample depth and will work at I2S protocol. Codecs will perform both capture and playback concurrently. The TDM protocol should have 4 slots for channels. Some po...

    €221 (Avg Bid)
    €221 Oferta Promedio
    3 ofertas

    Hi, This project has a digital input and digital output. You need to design and program a FPGA for filtering the digital input and give to digital output. Get Input signal --> debounce logic --> send to output Input range (0Hz .. 1MHz) --> Output 0Hz --> 350KHz 1) when the input is on for more than 2ns , turn on the output 2) if input is off for 5ns, turn off the output 3) Output mi...

    €51 (Avg Bid)
    €51 Oferta Promedio
    9 ofertas

    Design Specifications for the Alarm Clock ▪ Time should be displayed on the 6-digits of the 7-segment display (HHMMSS). o The left two digits will be the hour, middle two digits will display the minutes and the right two digits will display the seconds. (the period is not wired up in the DE0-CV board) o Hours will be displayed in “military time” (meaning 00 through 23). o Whenever the ...

    €229 (Avg Bid)
    €229 Oferta Promedio
    15 ofertas

    we need Portable Pt 100 4 ch device , High Precision 0.1 accuracy with 2C communication , display with battery/5v power supply

    €127 (Avg Bid)
    €127 Oferta Promedio
    13 ofertas

    more details will be given in the chat

    €22 (Avg Bid)
    €22 Oferta Promedio
    7 ofertas
    Verilog VHDL tasks 4 días left
    VERIFICADO

    Searching for people who has good knowledge in digital logic, Verilog and VHDL

    €15 (Avg Bid)
    €15 Oferta Promedio
    13 ofertas
    VHDL Structural Model 4 días left
    VERIFICADO

    I need to test a structural model of a sequence detector using t flip flops. I know my t equations, I have my entity and the testbench I am using to test the model. I need help constructing the structural model. It is based off a behavioral and dataflow model I already created. The software I'm using is Aldec.

    €11 / hr (Avg Bid)
    €11 / hr Oferta Promedio
    11 ofertas

    more details will be given in the chat

    €171 (Avg Bid)
    €171 Oferta Promedio
    3 ofertas

    I need the project A done as per the document bellow A Transimpedence/Limiting Amplifier (TIA/LA). The TIA should take the input in form of current (0.7mA -5mA) , for a current value in range should give an out put Swing of about 10mV with a bandwidth of 6.5GHz The LA should take the input from TIA and give the output swing of 200-250 mV. Simulation software Cadence will be provided and will u...

    €124 (Avg Bid)
    €124 Oferta Promedio
    10 ofertas
    Parallel Programming Project -- 2 3 días left
    VERIFICADO

    Parallel Programming Project with c/c++ with openmp

    €22 (Avg Bid)
    €22 Oferta Promedio
    10 ofertas

    Create a circuit to do parity detection on 4 bits using Xilinix ISE, will provide complete details in the chat.

    €36 (Avg Bid)
    €36 Oferta Promedio
    10 ofertas

    I need a EE/Computer Engineer graudte/PhD grad to help me with Digital Interfacing and Instrumentation , i need an expert in the following topics: Interfacing Basics, ADC Technologies, Microcontroller Ports, Timers and Interrupts 1, ADC interfacing, Scaling, DAC Methods, DAC Accuracy, Pulses and Counters, Pulse Width Modulation, Serial Interfacing, Sensor Family Overview, Sensor networks, Actuato...

    €167 (Avg Bid)
    €167 Oferta Promedio
    14 ofertas
    convert python code in to verilog 17 horas left
    VERIFICADO

    I have built a python code for multilayer perceptron MLP in python and I need help to convert it into Verilog code than to download it in hardware.

    €60 (Avg Bid)
    €60 Oferta Promedio
    4 ofertas
    convert python code in to verilog 12 horas left
    VERIFICADO

    I have built a python code for multilayer perceptron MLP in python and I need help to convert it into Verilog code than to download it in hardware.

    €307 (Avg Bid)
    €307 Oferta Promedio
    17 ofertas

    Hi i have project in advanced system analysis and i need : 1- use case diagram 2- class diagram 3- sequence diagram in the attachment there is the problem statement and the function for the system, if you want to add more function no issue also, every thing must be build based on object oriented

    €124 (Avg Bid)
    €124 Oferta Promedio
    26 ofertas