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    4 mpsoc design trabajados encontrados, precios en EUR

    ...petalinux environment who able to support and guide me when I need some help (like now) or some theoretical / technical questions will popped up. This session is going to be for at least a few months, so I’d like to share with you one of my challenges and see if its fit to you. My current project: Bringing up on my custom board a Linux Image, my custom board very similar to the ZCU 106 Ultrascale+ MPSoC board. What I've already achieved: I’ve generated the which contains: fsbl, uboot, bl31, pmufw, , u-boot and image.ub. When I program the flash with this the start running, but than an Error occurred: [ 4.421147] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(179,2) [ 4.429576] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4

    €33 / hr (Avg Bid)
    €33 / hr Oferta promedio
    3 ofertas

    Hi! I want to deploy a custom RISC-V processor on FPGA. There are two tasks: 1. Deploy the core to run C codes on it and blink an LED (the core is implemented in Verilog and synthesizable). 2. Boot Linux Kernel (files are ready). I want to deploy the processors on the ZCU102 Zynq MPSoC Board (Zynq UltraScale) FPGA.

    €440 (Avg Bid)
    €440 Oferta promedio
    6 ofertas

    Hi! I want to deploy a Bluespec RISC-V processor on FPGA and run C codes on it. There are two cores I am interested in: Piccolo and Flute, both available on GitHub. I want to deploy the processors on the Arty A7 Board (Artix-7) and ZCU102 Zynq MPSoC Board (Zynq UltraScale) FPGAs. At the moment, I was able to synthesise, implement and upload the bitstream to the FPGA. However, I need help to link the software to the hardware and run C codes on it, such as printing a hello word string on UART (ELF files can be generated using the RISC-V GNU Toolchain). The hardware IP Cores are shown in the attached image (for Vivado). Now, I need to run C codes in it, and I need help with that part.

    €209 (Avg Bid)
    €209 Oferta promedio
    3 ofertas

    I have a board with XCZU2EG-SFVA625-1-i, I want the correct DDR configuration for the below DDR in Vivado 2019.1 MPSoC block: (One DDR only) AS4C512M8D4-83BCN

    €146 (Avg Bid)
    €146 Oferta promedio
    2 ofertas